| STB6086 |
|---|
With 2 Ethernet on board on STB6086 platform and PCI expansion slot for various application development, the STB6086 and STB6086-CF models are idea hardware solution for router application, Internet security remote managment.W ith TVIA TV/VGA graphic chipset for simultaneous output, it can be idea platform for TV guide and Digital signage kiosk as well. |
- SPEC
- STB6086
- STB6086-CF
- FAQ
- Processor: VIA Nehemiah 1GHz
- Memory: 128 MB SDRAM, 3.3V SDRAM, Two 168-pin DIMM socket, Max of 1GB Memory
- Video
- TVIA CyberPro 5005
- 2D Graphics Accelerator
- Multi format Alpha blending
- 64 bit DRAM interface optimized for SGRAM 512 x 32 up to 4MB
- 2x ITU-BT656, ITU-BT601 8bit video input interface, one from EM8400 (VP-A), one from DVBS (VP-B)
- 6 on chip DACS provide simultaneous S-Video, composite and RGB/SCART output or simultaneous VGA and TV output (S-Video and composite or RGB/SCART)
- 3 Video windows plus PIP
- Color key, Chroma key, DirectDraw & Mpeg-1 playback
- NTSC 640 x 480 @ 60 Hz,
- PAL 800x600/720x540/640x480 @ 50Hz
- TVIA CyberPro 5005
- Audio
- IA VT1611A/612A audio codec with 3D
AC97 2.1 compliant codec
Legacy audio SBPRO compatible
- IA VT1611A/612A audio codec with 3D
- LAN: TWO (2) x Realtek 8139C 10/100 Base T
- Expansion slot: 1 x PCI w/ riser
- IDE: 2 x Ultra DMA33/66/100
- I/O connectors: 2 Serial , 2 x USB, PS/2 Mouse & PS/2 KB, VGA, S/PDIF
- Dimension: 340mm x 274mm x 60mm
- Power: ATX 65W; 5V, 12V, 100-240 V 50/60 Hz, auto switching, Auto Power Recovery
- Enviromental:
- Temperature: 00 C to 80 C
- Humidity: 5% ~ 95%
- Shock: 3.5 g @ 10ms duration
- Vibration: 0.5 g @ 22~100 Hz
- Temperature: 00 C to 80 C
- Safety: FCC, CE, LVD

- MPEG4 decoder (Optional)
- HDD (Optional)
- DOM support 128MB to 4GB
- ideal platform for Router & Internet Security Embedded System

- HDD (Optional)
- DOM support 128MB to 4GB
- CF modulator included
- ideal platform for TV Guide Kiosk display embedded system
This archive contains a test program to demonstrate the digital video overlay capability of the EM8400 board in a GCT-Allwell STB6086N2-MPEG2 box. It should work with other boxes of similar like - all you should have to play with is the REQUIRED_PORT_NUMBER define near the top. For the majority of video chipsets, that is going to be somewhere between 1 and 4. Suck it and see! |
Prerequisites: Have fun! |
This code was almost all written by Ian Levy in 2002. Although I do not claim to be much of a programmer, I was able to modify this code to respond to the native codes sent by the GCT Allwell remote that comes with the STB3036N and 6086N2 set top boxes. This is an ugly hack and I'm sure my code could be improved upon. It does work for me, however YMMV. |
The Allwell remote sends ASCII control sequences box just as though you entered the sequence from the keyboard. I have modified the code in ikldvd.c to respond to the following buttons: |
Why is routerlinux here? |
Short Version
|
routerlinux |
Routerlinux is a GNU/Linux distribution created specifically for turning the GCT Allwell set top boxes into multi-purpose IP routers. Designed to be installed on a 16Mb DiskOnChip module, routerlinux and GCT Allwell hardware combine to form a powerful, reliable, and multi-purpose networking tool. Intended for use by experienced Linux users, routerlinux lacks an easy to use configuration interface. However, in the true Linux tradition, where it lacks in ease of use, it easily makes up for in functionality:
For more information about routerlinux, visit http://www.routerlinux.com |
Since the some of the GCT platforms integrate the TVIA chipset onboard, we must all be prepared to deal with the issue of linux compatibility for development, integration and deployment purposes. This should give you a quick background and guide to the TVIA linux kernel FB world. As it stands, TVIA doesn't release source to any of their drivers unless you pay the [expensive] fee for support. This is pretty standard practice and could be well worth its weight in gold depending on your needs. Thankfully, they do release binary kernel FB modules and XFree86 drivers for linux compatibility.
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Before we begin... This procedure is not for the faint of heart. This requires a really good sense of preparing and configuring kernels, working with kernel modules (compiling, inserting, removing) and linux development (working with gcc, make, and a shell). |
Understanding MPEG playback on the GCT set top box |
If you plan on doing your testing in console mode, I would definitely make use of the TVIA framebuffer. Load the framebuffer module for your particular kernel. |
The 3rd LED on GCT-Allwell's STB1030N, STB3036N and STB6086N2 is designed for general purpose use. You can change the state by accessing PC97317 GPIO10 for indication of LAN access (GPIO11(input) will change state if LAN access) or indicate ERROR(server not found)
NOTE: Note that some of the following code came from the Linux kernel, so this is covered under and its use is subject to the GNU GPL. Any program that uses this code must run as root.
#include <sys/perm.h>
#include <sys/io.h>
//
// Refer to the National Semiconductor Datasheet for the 97317
#define SIO_GPIO_START 0x0fc0 file://GPIO Register IO space
#define SIO_PM_START 0x0fc8 file://PM Registers next to GPIO
#define SIO_INDEX 0x2e file://io address of the SIO index register
#define SIO_DATA 0x2f file://io address of the SIO data register
#define SIO_DEV_SEL 0x7
#define SIO_DEV_ENB 0x30
#define SIO_DEV_MSB 0x60
#define SIO_DEV_LSB 0x61
#define SIO_GP_DEV 0x7
#define SIO_PM_DEV 0x8
#define SIO_PM_BASE SIO_PM_START
#define SIO_PM_MSB (SIO_PM_BASE>>8)
#define SIO_PM_LSB (SIO_PM_BASE&0xff)
#define SIO_PM_INDEX (SIO_PM_BASE+0)
#define SIO_PM_DATA (SIO_PM_BASE+1)
#define SIO_PM_FER2 0x1
#define SIO_PM_GP_EN 0x80
#define SIO_GP_BASE SIO_GPIO_START
#define SIO_GP_MSB (SIO_GP_BASE>>8)
#define SIO_GP_LSB (SIO_GP_BASE&0xff)
// GPIO Register Bank 0
#define SIO_GP_DATA1 (SIO_GP_BASE)
#define SIO_GP_DIR1 (SIO_GP_BASE+1)
#define SIO_GP_OT1 (SIO_GP_BASE+2)
#define SIO_GP_PUC1 (SIO_GP_BASE+3)
// GPIO Register Bank 1
#define SIO_GP_LOCK1 (SIO_GP_BASE)
#define SIO_GP_I2O1 (SIO_GP_BASE+2)
#define GPIO10_MASK 1
#define GPIO_BANK_0 0 // mask of GPIO register bank 0 select bit in SIOC2
#define GPIO_BANK_1 0x80 // mask of GPIO register bank 1 select bit in SIOC2
#define OFF 1 // means a low on the GPIO which draws current
// through the LED, thus lighting it
#define ON 0
iopl(3);
/*
*
* First, we have to initialize the 317 part to allow us access
* to the GPIO registers.
*/
outb_p(SIO_DEV_SEL, SIO_INDEX);
outb_p(SIO_GP_DEV, SIO_DATA); /* Talk to GPIO regs. */
outb_p(SIO_DEV_MSB, SIO_INDEX);
outb_p(SIO_GP_MSB, SIO_DATA); /* MSB of GPIO base address */
outb_p(SIO_DEV_LSB, SIO_INDEX);
outb_p(SIO_GP_LSB, SIO_DATA); /* LSB of GPIO base address */
outb_p(SIO_DEV_ENB, SIO_INDEX);
outb_p(1, SIO_DATA); /* Enable GPIO registers. */
/*
* Now, we have to map the power management section to write
* a bit which enables access to the GPIO registers.
*/
outb(SIO_DEV_SEL, SIO_INDEX);
outb(SIO_PM_DEV, SIO_DATA); /* Talk to GPIO regs. */
outb(SIO_DEV_MSB, SIO_INDEX);
outb(SIO_PM_MSB, SIO_DATA); /* MSB of PM base address */
outb(SIO_DEV_LSB, SIO_INDEX);
outb(SIO_PM_LSB, SIO_DATA); /* LSB of PM base address */
outb(SIO_DEV_ENB, SIO_INDEX);
outb(1, SIO_DATA); /* Enable PM registers. */
/*
* Now, write the PM register which enables the GPIO registers.
*/
outb(SIO_PM_FER2, SIO_PM_INDEX);
outb(SIO_PM_GP_EN, SIO_PM_DATA);
outb(GPIO10_MASK,SIO_GP_DIR1); // set GPIO10 direction to output
outb(OFF,SIO_GP_DATA1); // initially turn the light OFF
--------------------------------------
To Blink:
outb(ON,SIO_GP_DATA1);
usleep(20000);
outb(OFF,SIO_GP_DATA1);
usleep(20000);
